VLSI Architectures for Healthcare System using Machine Learning: A Review
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Abstract
The rapid growth of artificial intelligence and machine learning (ML) has significantly influenced healthcare systems, enabling advanced diagnostic and predictive capabilities. However, the computational and energy demands of ML models create challenges for real-time, low-power, and resource-constrained medical devices. To overcome these limitations, Very-Large-Scale Integration (VLSI) architectures are increasingly adopted to accelerate ML algorithms such as convolutional neural networks (CNNs), long short-term memory (LSTM), and gradient boosting models like XGBoost. These architectures enable high-performance computation with reduced latency, power consumption, and silicon area, making them ideal for embedded and wearable healthcare applications. This review highlights recent advancements in VLSI architectures for ML-driven healthcare systems, emphasizing FPGA, ASIC, and hybrid SoC implementations from 2020 to 2025. The study discusses architectural trade-offs, quantization techniques, model compression, and dataflow optimization to improve efficiency. Additionally, emerging trends such as on-chip learning, hardware-aware model design, and secure edge inference are explored. The integration of VLSI with ML in healthcare not only enhances accuracy and speed in medical imaging, biosignal analysis, and disease prediction but also ensures privacy and reliability in edge-based clinical systems.
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