RAVINDRA KUMAR AHIRWAR, PROF. SURESH S. GAWANDE. VHDL Implementation of Reversible Arithmetic Logic Unit using Bidirectional Gate. International Journal of Advanced Research and Multidisciplinary Trends (IJARMT), [S. l.], v. 2, n. 1, p. 110–121, 2025. Disponível em: https://ijarmt.com/index.php/j/article/view/50. Acesso em: 25 jul. 2025.